Sony, George; Dr.V P N Nampoori(Cochin University of Science & Technology, September , 2011)
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Abstract:
The present thesis report the results obtained from the studies carried out on the
laser blow off plasma (LBO) from LiF-C (Lithium Fluoride with Carbon) thin film
target, which is of particular importance in Tokamak plasma diagnostics. Keeping
in view of its significance, plasma generated by the irradiation of thin film target by
nanosecond laser pulses from an Nd:YAG laser over the thin film target has been
characterized by fast photography using intensified CCD. In comparison to other
diagnostic techniques, imaging studies provide better understanding of plasma
geometry (size, shape, divergence etc) and structural formations inside the plume
during different stages of expansion.
Description:
International School of Photonics,Cochin University of Science and Technology
Gopikakumari, R; Dr.Sreedhar, C S(Cochin University Of Science And Technology, July 31, 1998)
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Abstract:
This thesis is an outcome of the investigations carried out on the development of an
Artificial Neural Network (ANN) model to implement 2-D DFT at high speed. A new
definition of 2-D DFT relation is presented. This new definition enables DFT computation
organized in stages involving only real addition except at the final stage of computation. The
number of stages is always fixed at 4. Two different strategies are proposed. 1) A visual
representation of 2-D DFT coefficients. 2) A neural network approach.
The visual representation scheme can be used to compute, analyze and manipulate 2D
signals such as images in the frequency domain in terms of symbols derived from 2x2
DFT. This, in turn, can be represented in terms of real data. This approach can help analyze
signals in the frequency domain even without computing the DFT coefficients.
A hierarchical neural network model is developed to implement 2-D DFT. Presently,
this model is capable of implementing 2-D DFT for a particular order N such that ((N))4 = 2.
The model can be developed into one that can implement the 2-D DFT for any order N upto a
set maximum limited by the hardware constraints. The reported method shows a potential in
implementing the 2-D DF T in hardware as a VLSI / ASIC
Description:
Department of Electronics,
Cochin University of Science and Technology