Poulose Jacob,K; Sreela Sasi; Rekha, James K(IEEE, December 9, 2009)
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Abstract:
Decimal multiplication is an integral part of
financial, commercial, and internet-based computations.
This paper presents a novel double digit decimal
multiplication (DDDM) technique that offers low latency
and high throughput. This design performs two digit
multiplications simultaneously in one clock cycle. Double
digit fixed point decimal multipliers for 7digit, 16 digit and
34 digit are simulated using Leonardo Spectrum from
Mentor Graphics Corporation using ASIC Library. The
paper also presents area and delay comparisons for these
fixed point multipliers on Xilinx, Altera, Actel and Quick
logic FPGAs. This multiplier design can be extended to
support decimal floating point multiplication for IEEE 754-
2008 standard.
Description:
Nature & Biologically Inspired Computing, 2009. NaBIC 2009. World Congress on
Poulose Jacob,K; Rekha, James K; Sreela Sasi(IEEE, April 1, 2009)
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Abstract:
Decimal multiplication is an integral part of financial,
commercial, and internet-based computations. This paper
presents a novel double digit decimal multiplication
(DDDM) technique that performs 2 digit multiplications
simultaneously in one clock cycle. This design offers low
latency and high throughput. When multiplying two n-digit
operands to produce a 2n-digit product, the design has a
latency of (n / 2) 1 cycles. The paper presents area
and delay comparisons for 7-digit, 16-digit, 34-digit double
digit decimal multipliers on different families of Xilinx,
Altera, Actel and Quick Logic FPGAs. The multipliers
presented can be extended to support decimal floating-point
multiplication for IEEE P754 standard
Description:
Programmable Logic, 2009. SPL. 5th Southern Conference on
James, Kurian; Saseendran Pillai, P R(December 8, 2008)
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Abstract:
This paper introduces a simple and efficient method
and its implementation in an FPGA for reducing the odometric
localization errors caused by over count readings of an
optical encoder based odometric system in a mobile robot
due to wheel-slippage and terrain irregularities. The detection
and correction is based on redundant encoder measurements.
The method suggested relies on the fact that the
wheel slippage or terrain irregularities cause more count
readings from the encoder than what corresponds to the
actual distance travelled by the vehicle. The standard quadrature
technique is used to obtain four counts in each encoder
period. In this work a three-wheeled mobile robot
vehicle with one driving-steering wheel and two-fixed rear
wheels in-axis, fitted with incremental optical encoders is
considered. The CORDIC algorithm has been used for the
computation of sine and cosine terms in the update equations.
The results presented demonstrate the effectiveness
of the technique
Description:
Journal of Automation, Mobile Robotics & Intelligent Systems VOLUME 3, No 3 2009