| Abstract: | Most of the commercial and financial data are stored in decimal fonn. Recently, support for decimal arithmetic has received increased attention due to the growing importance in financial analysis, banking, tax calculation, currency conversion, insurance, telephone billing and accounting. Performing decimal arithmetic with systems that do not support decimal computations may give a result with representation error, conversion error, and/or rounding error. In this world of precision, such errors are no more tolerable. The errors can be eliminated and better accuracy can be achieved if decimal computations are done using Decimal Floating Point (DFP) units. But the floating-point arithmetic units in today's general-purpose microprocessors are based on the binary number system, and the decimal computations are done using binary arithmetic. Only few common decimal numbers can be exactly represented in Binary Floating Point (BF P). ln many; cases, the law requires that results generated from financial calculations performed on a computer should exactly match with manual calculations. Currently many applications involving fractional decimal data perform decimal computations either in software or with a combination of software and hardware. The performance can be dramatically improved by complete hardware DFP units and this leads to the design of processors that include DF P hardware.VLSI implementations using same modular building blocks can decrease system design and manufacturing cost. A multiplexer realization is a natural choice from the viewpoint of cost and speed.This thesis focuses on the design and synthesis of efficient decimal MAC (Multiply ACeumulate) architecture for high speed decimal processors based on IEEE Standard for Floating-point Arithmetic (IEEE 754-2008). The research goal is to design and synthesize deeimal'MAC architectures to achieve higher performance.Efficient design methods and architectures are developed for a high performance DFP MAC unit as part of this research. |
| Description: | Department of Computer Science, Cochin University of Science and Technology |
| URI: | http://dyuthi.cusat.ac.in/purl/3105 |
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| Dyuthi-T1079.pdf | (7.708Mb) |
| Abstract: | The evolution of wireless sensor network technology has enabled us to develop advanced systems for real time monitoring. In the present scenario wireless sensor networks are increasingly being used for precision agriculture. The advantages of using wireless sensor networks in agriculture are distributed data collection and monitoring, monitor and control of climate, irrigation and nutrient supply. Hence decreasing the cost of production and increasing the efficiency of production. This paper describes the development and deployment of wireless sensor network for crop monitoring in the paddy fields of Kuttanad, a region of Kerala, the southern state of India. |
| Description: | International Journal of Engineering and Innovative Technology (IJEIT) Volume 2, Issue 1, July 2012 |
| URI: | http://dyuthi.cusat.ac.in/purl/3908 |
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| Development and ... ddy Fields of Kuttanad.pdf | (428.7Kb) |
| Abstract: | The recent trends envisage multi-standard architectures as a promising solution for the future wireless transceivers. The computationally intensive decimation filter plays an important role in channel selection for multi-mode systems. An efficient reconfigurable implementation is a key to achieve low power consumption. To this end, this paper presents a dual-mode Residue Number System (RNS) based decimation filter which can be programmed for WCDMA and 802.11a standards. Decimation is done using multistage, multirate finite impulse response (FIR) filters. These FIR filters implemented in RNS domain offers high speed because of its carry free operation on smaller residues in parallel channels. Also, the FIR filters exhibit programmability to a selected standard by reconfiguring the hardware architecture. The total area is increased only by 33% to include WLANa compared to a single mode WCDMA transceiver. In each mode, the unused parts of the overall architecture is powered down and bypassed to attain power saving. The performance of the proposed decimation filter in terms of critical path delay and area are tabulated |
| Description: | Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on Pages 952-955 |
| URI: | http://dyuthi.cusat.ac.in/purl/3875 |
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| Dual-Mode RNS based Programmable Decimation.pdf | (177.9Kb) |
| Abstract: | Iris Recognition is a highly efficient biometric identification system with great possibilities for future in the security systems area.Its robustness and unobtrusiveness, as opposed tomost of the currently deployed systems, make it a good candidate to replace most of thesecurity systems around. By making use of the distinctiveness of iris patterns, iris recognition systems obtain a unique mapping for each person. Identification of this person is possible by applying appropriate matching algorithm.In this paper, Daugman’s Rubber Sheet model is employed for irisnormalization and unwrapping, descriptive statistical analysis of different feature detection operators is performed, features extracted is encoded using Haar wavelets and for classification hammingdistance as a matching algorithm is used. The system was tested on the UBIRIS database. The edge detection algorithm, Canny, is found to be the best one to extract most of the iris texture. The success rate of feature detection using canny is 81%, False Accept Rate is 9% and False Reject Rate is 10%. |
| Description: | International Journal of Network Security & Its Applications (IJNSA), Vol.5, No.5, September 2013 |
| URI: | http://dyuthi.cusat.ac.in/purl/3904 |
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| EFFECTIVENESS O ... RIC RECOGNITION SYSTEM.pdf | (672.7Kb) |
| Abstract: | With the increasing popularity of wireless network and its application, mobile ad-hoc networks (MANETS) emerged recently. MANET topology is highly dynamic in nature and nodes are highly mobile so that the rate of link failure is more in MANET. There is no central control over the nodes and the control is distributed among nodes and they can act as either router or source. MANTEs have been considered as isolated stand-alone network. Node can add or remove at any time and it is not infrastructure dependent. So at any time at any where the network can setup and a trouble free communication is possible. Due to more chances of link failures, collisions and transmission errors in MANET, the maintenance of network became costly. As per the study more frequent link failures became an important aspect of diminishing the performance of the network and also it is not predictable. The main objective of this paper is to study the route instability in AODV protocol and suggest a solution for improvement. This paper proposes a new approach to reduce the route failure by storing the alternate route in the intermediate nodes. In this algorithm intermediate nodes are also involved in the route discovery process. This reduces the route establishment overhead as well as the time to find the reroute when a link failure occurs. |
| Description: | International Journal of Advanced Research in Computer and Communication Engineering Vol. 2, Issue 6, June 2013 |
| URI: | http://dyuthi.cusat.ac.in/purl/3913 |
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| An Effective Pa ... ute Stability in MANET.pdf | (513.4Kb) |
| Abstract: | Clustering combined with multihop communication is a promising solution to cope with the energy requirements of large scale Wireless Sensor Networks. In this work, a new cluster based routing protocol referred to as Energy Aware Cluster-based Multihop (EACM) Routing Protocol is introduced, with multihop communication between cluster heads for transmitting messages to the base station and direct communication within clusters. We propose EACM with both static and dynamic clustering. The network is partitioned into near optimal load balanced clusters by using a voting technique, which ensures that the suitability of a node to become a cluster head is determined by all its neighbors. Results show that the new protocol performs better than LEACH on network lifetime and energy dissipation |
| Description: | International Journal of Information Processing, 4(3), 9-16, 2010 |
| URI: | http://dyuthi.cusat.ac.in/purl/4167 |
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| Energy Aware Cl ... ol for Sensor Networks.pdf | (537.3Kb) |
| Abstract: | Data caching is an attractive solution for reducing bandwidth demands and network latency in mobile ad hoc networks. Deploying caches in mobile nodes can reduce the overall traf c considerably. Cache hits eliminate the need to contact the data source frequently, which avoids additional network overhead. In this paper we propose a data discovery and cache management policy for cooperative caching, which reduces the power usage, caching overhead and delay by reducing the number of control messages flooded into the network .A cache discovery process based on position cordinates of neighboring nodes is developed for this .The stimulstion results gives a promising result based on the metrics of the studies. |
| Description: | Elsevier publications 2013 |
| URI: | http://dyuthi.cusat.ac.in/purl/3910 |
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| Energy Efficien ... Mobile Ad oc Networks.pdf | (267.4Kb) |
| Abstract: | The evolution of wireless sensor network technology has enabled us to develop advanced systems for real time monitoring. In the present scenario wireless sensor networks are increasingly being used for precision agriculture. The advantages of using wireless sensor networks in agriculture are distributed data collection and monitoring, monitor and control of climate, irrigation and nutrient supply. Hence decreasing the cost of production and increasing the efficiency of production. This paper describes the security issues related to wireless sensor networks and suggests some techniques for achieving system security. This paper also discusses a protocol that can be adopted for increasing the security of the transmitted data |
| Description: | International Journal of Engineering and Innovative Technology (IJEIT) Volume 3, Issue 4, October 2013 |
| URI: | http://dyuthi.cusat.ac.in/purl/3911 |
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| Energy Optimize ... reless Sensor Networks.pdf | (384.0Kb) |
| Abstract: | Sensor networks are one of the fastest growing areas in broadwireless ad hoc networking (?Eld. A sensor node, typically'contains signal-processing circuits, micro-controllers and awireless transmitter/receiver antenna. Energy saving is oneof the critical issue for sensor networks since most sensorsare equipped with non-rechargeable batteries that have limited lifetime.In thiswork, four routing protocols for wireless sensor networks vizFlooding, Gossiping, GBR and LEACH have been simulated using Tiny OS and their power consumption is studied usingcaorwreiredTOoSuStIuMs.ingAMirceaal2izMaotitoens.of these protocols has been carried out using mica 2 motes |
| URI: | http://dyuthi.cusat.ac.in/purl/4178 |
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| Evaluation of t ... reless Sensor Networks.pdf | (906.9Kb) |
| Abstract: | Sensor networks are one of the fastest growing areas in broad of a packet is in transit at any one time. In GBR, each node in the network can look at itsneighbors wireless ad hoc networking (? Eld. A sensor node, typically'hop count (depth) and use this to decide which node to forward contains signal-processing circuits, micro-controllers and a the packet on to. If the nodes' power level drops below a wireless transmitter/receiver antenna. Energy saving is one certain level it will increase the depth to discourage trafiE of the critical issue for sensor networks since most sensors are equipped with non-rechargeable batteries that have limitedlifetime. Routing schemes are used to transfer data collectedby sensor nodes to base stations. In the literature many routing protocols for wireless sensor networks are suggested. In this work, four routing protocols for wireless sensor networks viz Flooding, Gossiping, GBR and LEACH have been simulated using TinyOS and their power consumption is studied using PowerTOSSIM. A realization of these protocols has beencarried out using Mica2 Motes. |
| Description: | Ad Hoc and Ubiquitous Computing, 2006. ISAUHC'06. International Symposium on |
| URI: | http://dyuthi.cusat.ac.in/purl/3882 |
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| Evaluation of t ... reless Sensor Networks.pdf | (906.1Kb) |
| Abstract: | Sensor networks are one of the fastest growing areas in broad of a packet is in transit at any one time. In GBR, each node in the network can look at itsneighbors wireless ad hoc networking (? Eld. A sensor node, typically'hop count (depth) and use this to decide which node to forward contains signal-processing circuits, micro-controllers and a the packet on to. If the nodes' power level drops below a wireless transmitter/receiver antenna. Energy saving is one certain level it will increase the depth to discourage trafiE of the critical issue forfor sensor networks since most sensors are equipped with non-rechargeable batteries that have limited lifetime. |
| Description: | Ad Hoc and Ubiquitous Computing, 2006. ISAUHC'06. International Symposium on |
| URI: | http://dyuthi.cusat.ac.in/purl/4145 |
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| Evaluation of the Power Consumption of.pdf | (906.1Kb) |
| Abstract: | In recent years, reversible logic has emerged as one of the most important approaches for power optimization with its application in low power CMOS, quantum computing and nanotechnology. Low power circuits implemented using reversible logic that provides single error correction – double error detection (SEC-DED) is proposed in this paper. The design is done using a new 4 x 4 reversible gate called ‘HCG’ for implementing hamming error coding and detection circuits. A parity preserving HCG (PPHCG) that preserves the input parity at the output bits is used for achieving fault tolerance for the hamming error coding and detection circuits. |
| Description: | TENCON 2007-2007 IEEE Region 10 Conference |
| URI: | http://dyuthi.cusat.ac.in/purl/3859 |
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| Fault Tolerant ... ng and Detection using.pdf | (168.5Kb) |
| Abstract: | Speech signals are one of the most important means of communication among the human beings. In this paper, a comparative study of two feature extraction techniques are carried out for recognizing speaker independent spoken isolated words. First one is a hybrid approach with Linear Predictive Coding (LPC) and Artificial Neural Networks (ANN) and the second method uses a combination of Wavelet Packet Decomposition (WPD) and Artificial Neural Networks. Voice signals are sampled directly from the microphone and then they are processed using these two techniques for extracting the features. Words from Malayalam, one of the four major Dravidian languages of southern India are chosen for recognition. Training, testing and pattern recognition are performed using Artificial Neural Networks. Back propagation method is used to train the ANN. The proposed method is implemented for 50 speakers uttering 20 isolated words each. Both the methods produce good recognition accuracy. But Wavelet Packet Decomposition is found to be more suitable for recognizing speech because of its multi-resolution characteristics and efficient time frequency localizations |
| Description: | Advances in Computing and Communications (ICACC), 2012 International Conference on |
| URI: | http://dyuthi.cusat.ac.in/purl/3888 |
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| Feature Extract ... ken Words in Malayalam.pdf | (261.9Kb) |
| Abstract: | Treating e-mail filtering as a binary text classification problem, researchers have applied several statistical learning algorithms to email corpora with promising results. This paper examines the performance of a Naive Bayes classifier using different approaches to feature selection and tokenization on different email corpora |
| Description: | International Journal of Computer Science and Communication Vol. 3, No. 1, January-June 2012, pp. 81-84 |
| URI: | http://dyuthi.cusat.ac.in/purl/3915 |
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| FEATURE SELECTI ... TEXT OF SPAM FILTERING.pdf | (402.6Kb) |
| Abstract: | Decimal multiplication is an integral part of financial, commercial, and internet-based computations. A novel design for single digit decimal multiplication that reduces the critical path delay and area for an iterative multiplier is proposed in this research. The partial products are generated using single digit multipliers, and are accumulated based on a novel RPS algorithm. This design uses n single digit multipliers for an n × n multiplication. The latency for the multiplication of two n-digit Binary Coded Decimal (BCD) operands is (n + 1) cycles and a new multiplication can begin every n cycle. The accumulation of final partial products and the first iteration of partial product generation for next set of inputs are done simultaneously. This iterative decimal multiplier offers low latency and high throughput, and can be extended for decimal floating-point multiplication. |
| Description: | Parallel and Distributed Processing with Applications, 2008. ISPA'08. International Symposium on |
| URI: | http://dyuthi.cusat.ac.in/purl/3874 |
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| Fixed Point Dec ... on using RPS Algorithm.pdf | (424.3Kb) |
| Abstract: | In this paper, we have evolved a generic software architecture for a domain specific distributed embedded system. The system under consideration belongs to the Command, Control and Communication systems domain. The systems in such domain have very long operational lifetime. The quality attributes of these systems are equally important as the functional requirements. The main guiding principle followed in this paper for evolving the software architecture has been functional independence of the modules. The quality attributes considered most important for the system are maintainability and modifiability. Architectural styles best suited for the functionally independent modules are proposed with focus on these quality attributes. The software architecture for the system is envisioned as a collection of architecture styles of the functionally independent modules identified |
| Description: | 2007 international conference on software emgineering theory and practice(SETP-07) |
| URI: | http://dyuthi.cusat.ac.in/purl/4177 |
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| A Generic Softw ... ibuted Embedded System.pdf | (473.8Kb) |
| Abstract: | Decimal multiplication is an integral part of financial, commercial, and internet-based computations. This paper presents a novel double digit decimal multiplication (DDDM) technique that offers low latency and high throughput. This design performs two digit multiplications simultaneously in one clock cycle. Double digit fixed point decimal multipliers for 7digit, 16 digit and 34 digit are simulated using Leonardo Spectrum from Mentor Graphics Corporation using ASIC Library. The paper also presents area and delay comparisons for these fixed point multipliers on Xilinx, Altera, Actel and Quick logic FPGAs. This multiplier design can be extended to support decimal floating point multiplication for IEEE 754- 2008 standard. |
| Description: | Nature & Biologically Inspired Computing, 2009. NaBIC 2009. World Congress on |
| URI: | http://dyuthi.cusat.ac.in/purl/3873 |
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| High Performanc ... Multiplier on ASIC and.pdf | (164.5Kb) |
| Abstract: | Wireless sensor networks monitor their surrounding environment for the occurrence of some anticipated phenomenon. Most of the research related to sensor networks considers the static deployment of sensor nodes. Mobility of sensor node can be considered as an extra dimension of complexity, which poses interesting and challenging problems. Node mobility is a very important aspect in the design of effective routing algorithm for mobile wireless networks. In this work we intent to present the impact of different mobility models on the performance of the wireless sensor networks. Routing characteristics of various routing protocols for ad-hoc network were studied considering different mobility models. Performance metrics such as end-to-end delay, throughput and routing load were considered and their variations in the case of mobility models like Freeway, RPGM were studied. This work will be useful to figure out the characteristics of routing protocols depending on the mobility patterns of sensors |
| Description: | International Conference on Sensors and Related Networks (SENNET’07), VIT University, Vellore, India. Dec. 12-14, 2007. pp.480-485. |
| URI: | http://dyuthi.cusat.ac.in/purl/4176 |
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| Impact of Node ... reless Sensor Networks.pdf | (147.2Kb) |
| Abstract: | Biometrics has become important in security applications. In comparison with many other biometric features, iris recognition has very high recognition accuracy because it depends on iris which is located in a place that still stable throughout human life and the probability to find two identical iris's is close to zero. The identification system consists of several stages including segmentation stage which is the most serious and critical one. The current segmentation methods still have limitation in localizing the iris due to circular shape consideration of the pupil. In this research, Daugman method is done to investigate the segmentation techniques. Eyelid detection is another step that has been included in this study as a part of segmentation stage to localize the iris accurately and remove unwanted area that might be included. The obtained iris region is encoded using haar wavelets to construct the iris code, which contains the most discriminating feature in the iris pattern. Hamming distance is used for comparison of iris templates in the recognition stage. The dataset which is used for the study is UBIRIS database. A comparative study of different edge detector operator is performed. It is observed that canny operator is best suited to extract most of the edges to generate the iris code for comparison. Recognition rate of 89% and rejection rate of 95% is achieved |
| Description: | Computer Science & Information Technology (CS & IT) |
| URI: | http://dyuthi.cusat.ac.in/purl/3906 |
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| IRIS BIOMETRIC ... PLOYING CANNY OPERATOR.pdf | (667.4Kb) |
| Abstract: | This paper describes JERIM-320, a new 320-bit hash function used for ensuring message integrity and details a comparison with popular hash functions of similar design. JERIM-320 and FORK -256 operate on four parallel lines of message processing while RIPEMD-320 operates on two parallel lines. Popular hash functions like MD5 and SHA-1 use serial successive iteration for designing compression functions and hence are less secure. The parallel branches help JERIM-320 to achieve higher level of security using multiple iterations and processing on the message blocks. The focus of this work is to prove the ability of JERIM 320 in ensuring the integrity of messages to a higher degree to suit the fast growing internet applications |
| Description: | International Journal of Computer Science and Applications, Vol. 5, No. 4, pp 11 - 25, 2008 |
| URI: | http://dyuthi.cusat.ac.in/purl/4021 |
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| Jerim-320 A New ... With Parallel Branches.pdf | (96.80Kb) |
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