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Please use this identifier to cite or link to this item: http://purl.org/purl/3860

Title: Decimal Multiplication using compact BCD Multiplier
Authors: Poulose Jacob,K
Shahana, T K
Rekha, James K
Sreela Sasi
Keywords: Decimal multiplication
internet-based computations
Binary Coded Decimal
Hex/Decimal multiplier
Issue Date: 1-Dec-2008
Publisher: IEEE
Abstract: Decimal multiplication is an integral part offinancial, commercial, and internet-based computations. The basic building block of a decimal multiplier is a single digit multiplier. It accepts two Binary Coded Decimal (BCD) inputs and gives a product in the range [0, 81] represented by two BCD digits. A novel design for single digit decimal multiplication that reduces the critical path delay and area is proposed in this research. Out of the possible 256 combinations for the 8-bit input, only hundred combinations are valid BCD inputs. In the hundred valid combinations only four combinations require 4 x 4 multiplication, combinations need x multiplication, and the remaining combinations use either x or x 3 multiplication. The proposed design makes use of this property. This design leads to more regular VLSI implementation, and does not require special registers for storing easy multiples. This is a fully parallel multiplier utilizing only combinational logic, and is extended to a Hex/Decimal multiplier that gives either a decimal output or a binary output. The accumulation ofpartial products generated using single digit multipliers is done by an array of multi-operand BCD adders for an (n-digit x n-digit) multiplication.
Description: Electronic Design, 2008. ICED 2008. International Conference on
URI: http://dyuthi.cusat.ac.in/purl/3860
Appears in Collections:Dr. K Poulose Jacob

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