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Please use this identifier to cite or link to this item: http://purl.org/purl/2686

Title: Efficient Transmitter/Receiver Architectures for High Performance Wireless Applications
Authors: Shahana, T K
Dr.Poulose Jacob, K
Dr.Sreela, Sasi
Keywords: Analog-to-digital converter(ADC)
Residue Number System (RNS)
Reed-Muller (RM) logic
Wireless Communication
Computer Science
Issue Date: Oct-2008
Publisher: Cochin University of Science and Technology
Abstract: The thesis focuses on efficient design methods and reconfiguration architectures suitable for higher performance wireless communication .The work presented in this thesis describes the development of compact,inexpensive and low power communication devices that are robust,testable and capable of handling multiple communication standards.A new multistandard Decimation Filter Design Toolbox is developed in MATLAB GUIDE environment.RNS based dual-mode decimation filters reconfigurable for WCDMA/WiMAX and WCDMA/WLANa standards are designed and implemented.It offers high speed operation with lesser area requirement and lower dynamic power dissipation.A novel sigma-delta based direct analog-to-residue converter that reduces the complexity of RNS conversion circuitry is presented.The performance of an OFDM communication system with a new RRNS-convolutional concatenated coding is analysed and improved BER performance is obtained under different channel conditions. Easily testable MAC units for filters are presented using Reed-Muller logic for realization.
Description: Department of Computer Science, Cochin University of Science and Technology
URI: http://dyuthi.cusat.ac.in/purl/2686
Appears in Collections:Faculty of Technology

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