dc.contributor.author |
Poulose Jacob,K |
|
dc.contributor.author |
Rekha, James K |
|
dc.contributor.author |
Shahana, T K |
|
dc.contributor.author |
Sreela Sasi |
|
dc.date.accessioned |
2014-06-11T05:50:21Z |
|
dc.date.available |
2014-06-11T05:50:21Z |
|
dc.date.issued |
2007-11-20 |
|
dc.identifier.uri |
http://dyuthi.cusat.ac.in/purl/3863 |
|
dc.description |
System-on-Chip, 2007 International Symposium on |
en_US |
dc.description.abstract |
Reversibility plays a fundamental role when logic gates such as AND, OR, and
XOR are not reversible. computations with minimal energy dissipation are considered.
Hence, these gates dissipate heat and may reduce the life of In recent years, reversible logic
has emerged as one of the most the circuit. So, reversible logic is in demand in power aware
important approaches for power optimization with its circuits. application in low power
CMOS, quantum computing and A reversible conventional BCD adder was proposed in using conventional reversible gates. |
en_US |
dc.description.sponsorship |
Cochin University of Science and Technology |
en_US |
dc.language.iso |
en |
en_US |
dc.publisher |
IEEE |
en_US |
dc.subject |
BCD adder |
en_US |
dc.subject |
decimal arithmetic |
en_US |
dc.subject |
reversible logic |
en_US |
dc.subject |
garbage output |
en_US |
dc.title |
A new look at reversible logic implementation of decimal adder |
en_US |
dc.type |
Article |
en_US |